Comparator circuit

ABSTRACT

A comparator circuit providing a hysteresis characteristic which does not change a hysteresis width even if a power supply voltage changes is disclosed. The comparator circuit comprises a differential amplifier including an input terminal, a reference terminal and an output terminal; an input voltage terminal to which an input voltage is applied; a reference voltage terminal to which a reference voltage is applied; at least one level shift means connected between said input voltage terminal and said input terminal, or between said reference voltage terminal and said reference terminal; a current source means connected to the output of said level shift means; and control means for controlling the current value of said current source means in accordance with the output level of said output terminal.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a comparator circuit, particularly to acomparator circuit providing the hysteresis characteristic which doesnot change the hysteresis width even if the power supply voltagechanges.

2. Description of the Prior Art

In case of configurating a comparator circuit with an IC and giving thehysteresis characteristic to said comparator circuit, the hysteresiswidth is determined ordinarily with power supply voltage and resistanceratio. In addition, in the case of an integrated circuit which can setfrom outside the power supply current and bias current such as a lowpower integrated circuit, such hysteresis width is determined by saidcurrent or internal resistance. The power supply voltage iscomparatively constant but in some cases changes considerably.

FIG. 1 shows the structure of existing ordinary comparator circuit. InFIG. 1, 10 is the high gain differential amplifier having the inputterminal (positive side) 1, reference terminal 2 (negative side) andoutput terminal 3, and its input terminal 1 is connected to the inputvoltage terminal 4, while the reference terminal 2 to the referencevoltage terminal 5. To the input voltage terminal 4, an input voltageV_(i) is applied while to the reference voltage terminal 5, thereference voltage V_(r) is applied. When V_(i) (1)<V_(r) (2); whereV_(i) (1) is an input voltage at the input terminal 1 and V_(r) (2) isthe reference voltage at the reference terminal 2, the differentialamplifier 10 outputs an output voltage V₀ of L (low) level to the outputterminal 3, and when V_(i) (1)>V_(r) (2), an output voltage V₀ of H(high) level.

The proportional operation area is distributed in the vicinity, whereV_(i) (1)=V_(r) (2) but when the gain is high, such operation area isvery narrow and V₀ is considered to change in the form of step whenV_(i) (1)=V_(r) (2) as shown in FIG. 2.

When an output voltage V₀ is fed back to the input terminal 1 of suchdifferential amplifier 10 via the resistor 12 (R_(f)), the hysteresischaracteristic having the width W is obtained as shown in FIG. 2. InFIG. 1, the input voltage terminal 4 to which an input voltage V_(i) isapplied has an input resistance R_(in) (R_(in) <R_(f)) but it is omittedin the drawing.

In FIG. 1, if an output voltage V₀ becomes H (high) level, for example,an input voltage V_(i) (1) is boosted by such H level. Therefore, V₀does not become L (low), because the relation V_(i) (1)<V_(r) (2) is notestablished if an input voltage V_(i) (4) is not lowered by that as muchas boosted or more. In addition, when an output voltage V₀ changes to Hfrom L, an output voltage V₀ becomes H only when an input voltage V_(i)(1) is lowered by means of the feedback resistance 12 and resultinglyV_(i) (4) becomes higher than that when the feedback resistance 12 isnot used.

The hysteresis width W of the comparator circuit having such hysteresischaracteristic is influenced by the power supply voltage V_(cc). Namely,the H level output voltage V₀ is determined by the power supply voltageV_(cc) and becomes small when the power supply voltage is lowered.Therefore, the circuit shown in FIG. 1 has a disadvantage that a valueof input voltage V_(i) (4) which changes from H level to L or from Llevel to H and resultingly the hysteresis width W also changes.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a comparator circuitwhich does not allow the hysteresis width to change due to a change ofpower supply voltage.

It is another object of the present invention to provide a comparatorcircuit which is capable of sustaining a constant hysteresis widthwithout requiring a change of constant of external elements even whenthe power supply voltage or power source current is changed in the rangeof several times of rated value.

These objects are attained, according to the present invention, byproviding

a comparator circuit comprising:

a differential amplifier including an input terminal,

a reference terminal and an output terminal;

an input voltage terminal to which an input voltage is applied;

a reference voltage terminal to which a reference voltage is applied;

at least one level shift means connected between said input voltageterminal and said input terminal, or between said reference voltageterminal and said reference terminal;

a current source means connected to the output of said level shiftmeans;

control means for controlling the current value of said current sourcemeans in accordance with the output level of said output terminal.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows the structure of existing comparator circuit.

FIG. 2 shows the hysteresis characteristic of the circuit shown in FIG.1.

FIG. 3 shows the structure of comparator circuit according to anembodiment of the present invention.

FIG. 4 is the structure of a comparator circuit according to the otherembodiment of the present invention.

FIG. 5 is the structure of a comparator circuit according to anotherembodiment of the present invention.

FIG. 6 is an example of the practical circuit corresponding to anembodiment of FIG. 3.

FIG. 7 is another example of practical circuit corresponding to anembodiment of FIG. 3.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 3 shows the structure of a comparator circuit according to anembodiment of the present invention. In FIG. 3, the same portions asthose in FIG. 1 are given the same numbering. In the circuit of FIG. 3,a level shift means 6 consisting of the base-emitter of transistor Q₁ isprovided between the input terminal 1 and input voltage terminal 4 ofdifferential amplifier 10, and a level shift means 7 consisting of thebase-emitter of transistor Q₂ is provided between the reference terminal2 and reference voltage terminal 5 of differential amplifier 10. V_(cc),V_(EE) are respectively the high and low voltage power supplies.

The emitter follower type transistors Q₁, Q₂ are driven by a constantcurrent by the current sources 8, 9 so that an input current can beignored. These currents I₁, I₂ are given by the following equations.

    I.sub.1 ≈I.sub.s e.sup.q/KT·.spsp.V.sup.BE1 (1)

    I.sub.2 ≈I.sub.s e.sup.q/KT·.spsp.V.sup.BE2 (2)

Here, I_(s) is the saturation current, q is the change of electron, k isthe Boltzman's constant, T is the absolute temperature, V_(BE1), V_(BE2)are the base emitter voltage of transistors Q₁, Q₂.

From the equations (1) and (2),

    V.sub.BE1 =KT/q ln I.sub.1 /I.sub.s                        (3)

    V.sub.BE2 =KT/q ln I.sub.2 /I.sub.s                        (4)

Therefore,

    V.sub.BE2 -V.sub.BE1 =KT/q ln I.sub.2 /I.sub.1             (5)

From the above equation, when I₁ =I₂, V_(BE1) =V_(BE2), and when I₂=2I₁, V_(BE2) -V_(BE1) =(kT/q)ln 2≈20(mV). In the case of this circuit,the current source 9 is allowed, for example, to change and the relationI₂ =I₁ is obtained when an output voltage V₀ is L level or the relationI₂ =mI₁ (here m>1) is obtained when it is H level. Thereby, when anoutput voltage V₀ =L level and V_(BE) which is the same as that in caseI₂ =I₁ is added to the input voltage V_(i) and reference voltage V_(r).Therefore it becomes equal to zero, considering it from the differentialamplifier 10, and an output voltage V₀ becomes H level when V_(i)>V_(r). When an output voltage V₀ becomes H level, the current source 9outputs mI₁ and V_(BE2) becomes large as is obvious from the equation(4) (increment is considered as ΔV). Namely, the reference voltage V_(r)is supposed to be lowered by ΔV when considered from the differentialamplifier 10. Therefore, a voltage being input to the input terminal 1of the differential amplifier 10 seems to be relatively increased. Forthis reason, when an output voltage V₀ returns to the L level, an inputvoltage V_(i) must be lowered by ΔV than the reference voltage V_(r) andthereby an output voltage V₀ indicates the hysteresis characteristichaving the width of ΔV. Moreover, the width ΔV, as is obvious from theequation (5), depends on the physical constants such as k, T, q and acurrent ratio of I₂ /I₁, but on the power supply voltage V_(CC). Thehysteresis width thus obtained is not influenced by the power supplyvoltage fluctuation. In the case of integrated circuits, resistancevalues fluctuate considerably but a current ratio of the constantcurrent source can be set accurately to the desired value. Resultingly,the hysteresis width can be adjusted accurately by changing such currentratio.

Since the hysteresis width is determined by a changed value m of currentof the current source 9, when, m=10 (at this time, said width is about60 mV), a large hysteresis width can be obtained. In addition, when thecurrent source 8 in the input voltage V_(i) side is increased in thebackward direction together with the current source 9, namely when I₂ isincreased m times, the hysteresis width is doubled against to that whileonly one current source is used by changing I₁ to I/m.

In such a case where only the current source 9 is changed, the levelshift means 6 and current source 8 can be omitted. However, in thiscase, an input voltage V_(i) is directly applied to the input terminal 1(without level shift) and therefore when V_(i) >V_(r) -V_(BE2), anoutput voltage V_(o) turns to the H level from L level.

At any rate, the hysteresis characteristic can be obtained bycontrolling a constant current value of the current source 8 or 9.

FIG. 4 shows the structure of a comparator circuit according to anotherembodiment of the present invention.

In FIG. 4, as the level shift means 6, 7, diodes are used and others arethe same as those in FIG. 3.

FIG. 5 shows the structure of a comparator circuit according to anotherembodiment of the present invention.

As shown in FIG. 4, when the level shift means 6, 7 are formed byinserting in series the diodes to the emitter of transistors Q₁, Q₂,amount of change in the forward voltage of diode is added. Therefore,the range of hysteresis width change due to a change of current value ofthe current source becomes wide. Namely, when values of constant currentsource are I₁, I₂ for the L level output voltage V₀ and these arechanged respectively to I₁ ', I₂ ' for the H level output voltage V₀,

    ΔV=N(kT/q) ln (I.sub.2 /I.sub.1 ·I.sub.1 '/I.sub.2 ')

when the sum of the transistors and diodes used for level shifts isconsidered as N for both inputs.

A current value of the constant current source can be done easily, forexample, by changing over the two current sources of I₁, mI₁ preparedwith the H and L levels of the output voltage V₀.

FIG. 6 is an example of the practical circuit corresponding to anembodiment of FIG. 3.

In this figure, the transistors Q₁₀₁ to Q₁₀₃, Q₃, Q₄ and Q₇ correspondto said differential amplifier 10, and Q₁, Q₂ are input transistors,while Q₆, Q₈, Q₁₁ are current source transistor and these respectivelycorrespond to said level shift means 6, 7 and current sources 8, 9.

The transistors Q₁₀₄ to Q₁₀₆ controls the circuit for generating thebias current I₀, while the transistors Q₅, Q₉, Q₁₀ controls the biascurrent of differential amplifier 10 with said current. In case theoutput voltage V₀ is L level in this case, the transistor Q₉ is OFF, andresultingly the bias current I₁ of transistor Q₁ is two times of I₀ andthe bias current I₂ of transistor Q₂ is equal to I₀. Therefore, V_(BE)of transistor Q₁ and V_(BE) of transistor Q₂ are in the followingrelation:

    V.sub.BE1 -V.sub.BE2 ≈20 mV

In addition the base potentials V₁, V₂ of transistors Q₃, Q₄ areexpressed as follows:

    V.sub.1 =V.sub.i -V.sub.BE1

    V.sub.2 =V.sub.r -V.sub.BE2

Therefore, a difference of these voltages V₁, V₂ becomes as follows:##EQU1##

When the input voltage V_(i) changes to H level from L level, the outputV₀ changes to H level from L level at the point where V_(i) =V_(r) +20mV. When the output voltage V₀ becomes H level, the transistor Q₉ turnsON and I₁ =I₂ =I₀. Thus, V₁ -V₂ =V_(i) -V_(r). When V_(i) changes to Llevel from H level, V₀ becomes L level from H level at the point whereV_(i) =V_(r). Thus, this circuit has the hysteresis width of ΔV=20 mV.

FIG. 7 shows another practical example. This circuit is different fromFIG. 6 in such a point that the current source transistors Q₆, Q₈ areomitted. In this circuit, the base current of transistors Q₃, Q₄ in thenext stage is used as the bias current of level shift means 6, 7 andtherefore the hysteresis width ΔW becomes as follows: ##EQU2##

β is the current amplification coefficient of the NPN transistors Q₃,Q₄. When β changes within the range from 50 to 250, ΔW=120 to 160 mV,resulting in a large hysteresis width. Therefore, the circuit of FIG. 7is a very effective circuit for a certain purpose.

As explained above, according to the present invention, a comparatorcircuit having the hysteresis characteristic of the accurate width whichis not influenced by fluctuation of power source voltage is obtained bythe method that the input voltage V_(i) and/or the reference voltageV_(r) is shifted by V_(BE) of transistor and said V_(BE) is changed inaccordance with the output level of the comparator circuit.

While the invention has been shown and described with respect to thepreferred embodiment thereof, it will be understood by those skilled inthe art that various changes in form and detail may be made thereinwithout departing from the spirit and scope of the invention.

We claim:
 1. A comparator circuit operatively connected to receive inputand reference voltages, comprising:a differential amplifier including aninput terminal, a reference terminal and an output terminal; an inputvoltage terminal to which the input voltage is applied; a referencevoltage terminal to which the reference voltage is applied; first levelshift means, operatively connected between said input voltage terminaland said input terminal, for shifting the level of the input voltage;first current source means, operatively connected to said first levelshift means, for supplying current having a first current value to saidfirst level shift means; and control means, operatively connected tosaid first current source means and said output terminal, forcontrolling the first current value of said first current source meansin accordance with the output level of said output terminal.
 2. Acomparator circuit as claimed in claim 1,wherein said comparator circuitfurther comprises second level shift means operatively connected betweensaid reference voltage terminal and said reference terminal, whereinsaid first current source means is operatively connected to said controlmeans and said first level shift means, and wherein said comparatorcircuit further comprises second current source means, operativelyconnected to said control means and said second level shift means, forsupplying current having a second current value to said second levelshift means.
 3. A comparator circuit as claimed in claim 1, wherein saidfirst level shift means comprises a transistor having a base operativelyconnected to said input terminal and having an emitter operativelyconnected to said input terminal.
 4. A comparator circuit as claimed inclaim 1, wherein said first level shift means comprises a diode havingan anode operatively connected to said input voltage terminal and havinga cathode operatively connected to said input terminal.
 5. A comparatorcircuit as claimed in claim 1,wherein said comparator circuit furthercomprises second level shift means operatively connected between saidinput voltage terminal and said input terminal, wherein said firstcurrent source means is operatively connected to said control means andsaid first level shift means, and wherein said comparator circuitfurther comprises second current source means, operatively connected tosaid control means and said second level shift means, for supplyingcurrent having a second current value to said second level shift means.6. A comparator circuit as claimed in claim 1, wherein said first levelshift means comprises a transistor having a base operatively connectedto said reference voltage terminal and having an emitter operativelyconnected to said reference terminal.
 7. A comparator circuit as claimedin claim 1, wherein said first level shift means comprises a diodehaving an anode operatively connected to said reference voltage terminaland having a cathode operatively connected to said reference terminal.8. A comparator circuit operatively connected to receive input andreference voltages, comprising:a differential amplifier including aninput terminal, a reference terminal and an output terminal; an inputvoltage terminal to which the input voltage is applied; a referencevoltage terminal to which the reference voltage is applied; first levelshift means, operatively connected between said reference voltageterminal and said reference terminal, for shifting the level of thereference voltage; first current source means, operatively connected tosaid first level shift means, for supplying current having a firstcurrent value to said first level shift means; and control means,operatively connected to said first current source means and said outputterminal, for controlling the first current value of said first currentsource means in accordance with the output level of said outputterminal.